With the ever increasing demand put upon manufacturers of electronics for low cost and high performance, a problem that many of these manufactures of electronic devices are encountering is being able to compensate for the operating tolerances or offset characteristics of the electronic devices. Mismatch is introduced between electronic components because no components can be perfectly manufactured. For example, a comparator, in its basic form, compares two inputs to determine which one is of higher magnitude. It outputs a high or low response depending on whether a first input is higher than a second input, and in operation should operate over a wide common mode range. This means that the comparator should function properly whether operating at low or high voltages. The offset characteristics of a comparator produces a range of values for which a lower signal applied to the first terminal will still produce a low response or for which a higher signal applied to the second terminal will produce a high response.
One current way of determining and compensating for the offset between the two terminals of the comparator is through the use of capacitors, which are able to hold a charge for repeated sampling. The comparator's inputs are sampled, and by a series of switches the offset of the comparator is determined. This determined offset can then be stored on the capacitors for a short period.
However, there are several drawbacks to this method. First, charging the capacitors consumes considerable power, compared to the comparator, and must be of high fidelity. This makes the method unattractive for a low cost, low power type devices. Also, due to parasite leakages across the capacitor, the offset can be stored for only a short duration. These leakages increase with increased temperature, which limits the operating temperature of the device. The capacitors themselves will also degrade over time.
Another way of compensating for offset is by trimming the device. This method is often used for computer chips. In this method, a set of resistors is implanted on a chip. During the manufacturing process, but after the chip is made, the bias is determined and compensated for by fusing or severing the links between the resistors on the chip. On-chip trimming techniques can reduce offset voltage to a very low value.
The trimming technique has a drawback in that it is one time or a single shot operation and is therefore only provides compensation for the offset of the conditions under which it was tested. For a system that may undergo a wide range of operating conditions, trimming may not be optimal. There is also an increased cost of manufacturing when using this method.